efuse 加密文件 linux,ISE iMPACT eFUSE加密问题-蒲公英云

efuse 加密文件 linux,ISE iMPACT eFUSE加密问题

Virtex®-6 and Spartan®-6 FPGAs have eFUSE registers; four registers in a Virtex-6 FPGA and three registers in a Spartan-6 FPGA. These registers store bitstream encryption information, a user-defined code (Virtex-6 devices only), DNA (device identification) information, and information about the read/write status of the eFUSE registers. A bit in an eFUSE register is programmed by burning a fuse link; eFUSE bits are one-time programmable. A programmed fuse is assigned a logic value of 1 and a pristine fuse is assigned a logic value of 0.

These Xilinx® FPGAs contain programmable eFUSE registers:

Virtex-6 — LXT, HXT, and CXT devices

Spartan-6 — LX75 /LX75T, LX100/LX100T, LX150/LX150T devices

You can use iMPACT to program and read the eFUSE registers. All programming and reading is done with the FPGA in a Boundary-Scan (JTAG) chain with the FPGA unconfigured.

The eFUSE registers in Virtex-6 and Spartan-6 FPGAs are:

AES Key Register – Stores the 256–bit AES (Advanced Encryption Standard) key for use by the AES bitstream decryptor. The AES key is used by the FPGA’s decryption engine to load encrypted bitstreams. You can use iMPACT to write and read this register.

In iMPACT, you write to this register by accessing key information in an Encryption Key (NKY) file.

User Register (Virtex-6 only) – Stores a 32–bit user-defined code. You can use iMPACT to write and read this register.

DNA Register – This is a 57–bit read-only register containing DNA (device identification) information programmed when the FPGA is manufactured. You can use iMPACT to read this register.

Control Register – Stores bits that control AES key use and read/write access to the eFUSE registers, including the control register itself. You can use iMPACT to write and read this register.

For a detailed description of eFUSE registers and bitstream encryption, see the Virtex-6 FPGA Configuration User Guide or the Spartan-6 FPGA Configuration User Guide on the Xilinx® website (www.xilinx.com).

These are the requirements for programming or reading the eFUSE registers using iMPACT:

iMPACT is running on a PC with a 32–bit Microsoft Windows OS.

iMPACT is operating in Boundary Scan mode, and the unconfigured target FPGA device is in the chain in the Boundary Scan window.

You are connected to the Boundary Scan chain through a Platform Cable USB II download cable.

The Boundary Scan chain is operating at a cable speed of 6 MHz. To set the cable speed, run the command Output > Cable Setup and set the TCK Speed/Baud Rate option in the Cable Communication Setup dialog box.

The target FPGA is not currently programmed. No bitstream information has been downloaded into the FPGA.

The VFS and VCCAUX voltages supplied to the FPGA are set to the required levels. Voltages necessary for eFUSE reading and writing are described in the Virtex-6 FPGA Configuration User Guide or the Spartan-6 FPGA Configuration User Guide.

In iMPACT, you can perform the following procedures on eFUSE registers:

Programming eFUSE Registers

Reading eFUSE Registers

Setting the eFUSE Control Register

Reading the eFUSE Control Register

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