vivado sata ip (phy)配置

Bertha 。 2022-11-01 05:37 196阅读 0赞

sata phy:

![watermark_type_ZmFuZ3poZW5naGVpdGk_shadow_10_text_aHR0cHM6Ly9ibG9nLmNzZG4ubmV0L3UwMTEzMjk5Njc_size_16_color_FFFFFF_t_70][]

以下步骤供参考，尚未开发验证

1、选择预设值为GTH\_SATA\*，sata的协议为1.5/3/6Gbps(并且只有一组收发通道，即x1)，选CPLL时钟即可

![watermark_type_ZmFuZ3poZW5naGVpdGk_shadow_10_text_aHR0cHM6Ly9ibG9nLmNzZG4ubmV0L3UwMTEzMjk5Njc_size_16_color_FFFFFF_t_70 1][]

2、数据宽度根据sata协议选择16bit 8/10b编码；勾选OOB使能，默认均衡模式使用DFE在高速时信号会好点

![watermark_type_ZmFuZ3poZW5naGVpdGk_shadow_10_text_aHR0cHM6Ly9ibG9nLmNzZG4ubmV0L3UwMTEzMjk5Njc_size_16_color_FFFFFF_t_70 2][]

![watermark_type_ZmFuZ3poZW5naGVpdGk_shadow_10_text_aHR0cHM6Ly9ibG9nLmNzZG4ubmV0L3UwMTEzMjk5Njc_size_16_color_FFFFFF_t_70 3][]

3、drp时钟根据提示范围设置

![watermark_type_ZmFuZ3poZW5naGVpdGk_shadow_10_text_aHR0cHM6Ly9ibG9nLmNzZG4ubmV0L3UwMTEzMjk5Njc_size_16_color_FFFFFF_t_70 4][]

4、comma设置用于数据对齐

![watermark_type_ZmFuZ3poZW5naGVpdGk_shadow_10_text_aHR0cHM6Ly9ibG9nLmNzZG4ubmV0L3UwMTEzMjk5Njc_size_16_color_FFFFFF_t_70 5][]

5、clock correction设置【bonding功能可以实现x2/x4等模式，以及硬盘阵列的GRAD 0模式，一般不使用】

![watermark_type_ZmFuZ3poZW5naGVpdGk_shadow_10_text_aHR0cHM6Ly9ibG9nLmNzZG4ubmV0L3UwMTEzMjk5Njc_size_16_color_FFFFFF_t_70 6][]

![20210224232613178.png][]

6、Example Design

![watermark_type_ZmFuZ3poZW5naGVpdGk_shadow_10_text_aHR0cHM6Ly9ibG9nLmNzZG4ubmV0L3UwMTEzMjk5Njc_size_16_color_FFFFFF_t_70 7][]

7、DRP端口勾选

![watermark_type_ZmFuZ3poZW5naGVpdGk_shadow_10_text_aHR0cHM6Ly9ibG9nLmNzZG4ubmV0L3UwMTEzMjk5Njc_size_16_color_FFFFFF_t_70 8][]

8、CDR端口【详见UG576/209】

![watermark_type_ZmFuZ3poZW5naGVpdGk_shadow_10_text_aHR0cHM6Ly9ibG9nLmNzZG4ubmV0L3UwMTEzMjk5Njc_size_16_color_FFFFFF_t_70 9][]

![watermark_type_ZmFuZ3poZW5naGVpdGk_shadow_10_text_aHR0cHM6Ly9ibG9nLmNzZG4ubmV0L3UwMTEzMjk5Njc_size_16_color_FFFFFF_t_70 10][]

![watermark_type_ZmFuZ3poZW5naGVpdGk_shadow_10_text_aHR0cHM6Ly9ibG9nLmNzZG4ubmV0L3UwMTEzMjk5Njc_size_16_color_FFFFFF_t_70 11][]

9、OOB端口

![watermark_type_ZmFuZ3poZW5naGVpdGk_shadow_10_text_aHR0cHM6Ly9ibG9nLmNzZG4ubmV0L3UwMTEzMjk5Njc_size_16_color_FFFFFF_t_70 12][]

其它参考：

[https://github.com/timewh/sata3\_host\_controller][https_github.com_timewh_sata3_host_controller]

[https://www.xilinx.com/support/answers/43482.html][https_www.xilinx.com_support_answers_43482.html]

[https://www.xilinx.com/support/answers/53364.html][https_www.xilinx.com_support_answers_53364.html] (重要RXCDR\_CONFG)

![watermark_type_ZmFuZ3poZW5naGVpdGk_shadow_10_text_aHR0cHM6Ly9ibG9nLmNzZG4ubmV0L3UwMTEzMjk5Njc_size_16_color_FFFFFF_t_70 13][]

[https://zhuanlan.zhihu.com/p/45851462][https_zhuanlan.zhihu.com_p_45851462]

参考设计：

[https://www.xilinx.com/support/documentation/application\_notes/xapp870.pdf][https_www.xilinx.com_support_documentation_application_notes_xapp870.pdf]

![watermark_type_ZmFuZ3poZW5naGVpdGk_shadow_10_text_aHR0cHM6Ly9ibG9nLmNzZG4ubmV0L3UwMTEzMjk5Njc_size_16_color_FFFFFF_t_70 14][]

SATA 8b/10b的错误记录：

[https://forums.xilinx.com/t5/Serial-Transceivers/GTH-transceiver-for-SATA-PHY/m-p/1009879\#M5141][https_forums.xilinx.com_t5_Serial-Transceivers_GTH-transceiver-for-SATA-PHY_m-p_1009879_M5141]

![watermark_type_ZmFuZ3poZW5naGVpdGk_shadow_10_text_aHR0cHM6Ly9ibG9nLmNzZG4ubmV0L3UwMTEzMjk5Njc_size_16_color_FFFFFF_t_70 15][]

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![watermark_type_ZmFuZ3poZW5naGVpdGk_shadow_10_text_aHR0cHM6Ly9ibG9nLmNzZG4ubmV0L3UwMTEzMjk5Njc_size_16_color_FFFFFF_t_70 16][]

![watermark_type_ZmFuZ3poZW5naGVpdGk_shadow_10_text_aHR0cHM6Ly9ibG9nLmNzZG4ubmV0L3UwMTEzMjk5Njc_size_16_color_FFFFFF_t_70 17][]

SATA3协议手册

[https://github.com/timewh/xc7a50t-elecclub/blob/will/SATA%E5%8D%8F%E8%AE%AE3.0.pdf][https_github.com_timewh_xc7a50t-elecclub_blob_will_SATA_E5_8D_8F_E8_AE_AE3.0.pdf]

[https://gitee.com/timewh/xc7a50t-elecclub/blob/master/SATA%E5%8D%8F%E8%AE%AE3.0.pdf][https_gitee.com_timewh_xc7a50t-elecclub_blob_master_SATA_E5_8D_8F_E8_AE_AE3.0.pdf]

xilinx sata ref:

[https://gitee.com/timewh/xc7a50t-elecclub/blob/master/xapp870.pdf][https_gitee.com_timewh_xc7a50t-elecclub_blob_master_xapp870.pdf]

[https://gitee.com/timewh/xc7a50t-elecclub/blob/master/c\_xapp716.pdf][https_gitee.com_timewh_xc7a50t-elecclub_blob_master_c_xapp716.pdf]

![watermark_type_ZmFuZ3poZW5naGVpdGk_shadow_10_text_aHR0cHM6Ly9ibG9nLmNzZG4ubmV0L3UwMTEzMjk5Njc_size_16_color_FFFFFF_t_70 18][]

![watermark_type_ZmFuZ3poZW5naGVpdGk_shadow_10_text_aHR0cHM6Ly9ibG9nLmNzZG4ubmV0L3UwMTEzMjk5Njc_size_16_color_FFFFFF_t_70 19][]

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[watermark_type_ZmFuZ3poZW5naGVpdGk_shadow_10_text_aHR0cHM6Ly9ibG9nLmNzZG4ubmV0L3UwMTEzMjk5Njc_size_16_color_FFFFFF_t_70 4]: /images/20221024/21be13fd22f843eda2e35d4b4501a6a5.png
[watermark_type_ZmFuZ3poZW5naGVpdGk_shadow_10_text_aHR0cHM6Ly9ibG9nLmNzZG4ubmV0L3UwMTEzMjk5Njc_size_16_color_FFFFFF_t_70 5]: /images/20221024/774e5661623843a5b47a08639575e65f.png
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[20210224232613178.png]: /images/20221024/42235ecd94cd4fbc921749f46f9c3ea6.png
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[watermark_type_ZmFuZ3poZW5naGVpdGk_shadow_10_text_aHR0cHM6Ly9ibG9nLmNzZG4ubmV0L3UwMTEzMjk5Njc_size_16_color_FFFFFF_t_70 11]: /images/20221024/198fb40c50a3494fbab245e10f22a245.png
[watermark_type_ZmFuZ3poZW5naGVpdGk_shadow_10_text_aHR0cHM6Ly9ibG9nLmNzZG4ubmV0L3UwMTEzMjk5Njc_size_16_color_FFFFFF_t_70 12]: /images/20221024/f6afce08e3594a15920c60ad91d9402c.png
[https_github.com_timewh_sata3_host_controller]: https://github.com/timewh/sata3_host_controller
[https_www.xilinx.com_support_answers_43482.html]: https://www.xilinx.com/support/answers/43482.html
[https_www.xilinx.com_support_answers_53364.html]: https://www.xilinx.com/support/answers/53364.html
[watermark_type_ZmFuZ3poZW5naGVpdGk_shadow_10_text_aHR0cHM6Ly9ibG9nLmNzZG4ubmV0L3UwMTEzMjk5Njc_size_16_color_FFFFFF_t_70 13]: /images/20221024/b3119163371043928564360175a18092.png
[https_zhuanlan.zhihu.com_p_45851462]: https://zhuanlan.zhihu.com/p/45851462
[https_www.xilinx.com_support_documentation_application_notes_xapp870.pdf]: https://www.xilinx.com/support/documentation/application_notes/xapp870.pdf
[watermark_type_ZmFuZ3poZW5naGVpdGk_shadow_10_text_aHR0cHM6Ly9ibG9nLmNzZG4ubmV0L3UwMTEzMjk5Njc_size_16_color_FFFFFF_t_70 14]: /images/20221024/36652a818b95430d9d8bf5ca64900f62.png
[https_forums.xilinx.com_t5_Serial-Transceivers_GTH-transceiver-for-SATA-PHY_m-p_1009879_M5141]: https://forums.xilinx.com/t5/Serial-Transceivers/GTH-transceiver-for-SATA-PHY/m-p/1009879#M5141
[watermark_type_ZmFuZ3poZW5naGVpdGk_shadow_10_text_aHR0cHM6Ly9ibG9nLmNzZG4ubmV0L3UwMTEzMjk5Njc_size_16_color_FFFFFF_t_70 15]: /images/20221024/1acd1a5d2ef845f2b4bc135b873efa13.png
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[https_github.com_timewh_xc7a50t-elecclub_blob_will_SATA_E5_8D_8F_E8_AE_AE3.0.pdf]: https://github.com/timewh/xc7a50t-elecclub/blob/will/SATA%E5%8D%8F%E8%AE%AE3.0.pdf
[https_gitee.com_timewh_xc7a50t-elecclub_blob_master_SATA_E5_8D_8F_E8_AE_AE3.0.pdf]: https://gitee.com/timewh/xc7a50t-elecclub/blob/master/SATA%E5%8D%8F%E8%AE%AE3.0.pdf
[https_gitee.com_timewh_xc7a50t-elecclub_blob_master_xapp870.pdf]: https://gitee.com/timewh/xc7a50t-elecclub/blob/master/xapp870.pdf
[https_gitee.com_timewh_xc7a50t-elecclub_blob_master_c_xapp716.pdf]: https://gitee.com/timewh/xc7a50t-elecclub/blob/master/c_xapp716.pdf
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